Lab 2 : Combinational Digital Circuit Design Simulation Using Deeds Simulator
Tasks
- Producing digital logic circuit, generating truth table and Timing Diagram with Deeds Simulator.
- Complete a cycle process of a combinational circuit design and simulate with Deeds Simulator.
Group Member
- Mursyidah binti Jahidi
- Balqis Batrisya binti Jalaluddin
Reflection
- Doing Lab 2 was very different experience compared to Lab 1 because we moved from physical breadboarding to
using the Deed Simulator. It's really interesting I could simply choose components such as input, output,
OR gate, then connect them with wires and immediately test how the circuit functions. The most challenging
part of this lab was completing the truth table for the LRT station problem statement in part 2. I found it
a bit difficult to handle four inputs at the same time, the coach status and three sensors, which required a
lot of focus.
Another interesting part was converting the circuit into a NAND gates only. Actually it was confusing
especially the second circuit which the output ALARM to convert to NAND gates, but it helped me understand
the the concept of universal gates more deeply. After successfully get the same output for the original circuit
and the NAND gates circuit, this showed me that complex logic circuit can be implemented using only one type of gate.
This Lab 2 was not carried out in the lab, but my partner and I managed to complete this lab together.
We shared ideas and compared our answers to avoid mistakes, and I thankful that we were able to complete and submit
the lab on time.